An ATM communication system provides high-speed, low-delay switching of voice, data, video and other types of user information traffic. In an ATM system, the user information traffic is separated into fixed-length 53-byte cells. Each ATM cell typically includes a 5-byte header and a 48-byte payload. The header incorporates a virtual channel identifier (VCI) and a virtual path identifier (VPI) associated with the corresponding cell. The VCI and VPI together specify a virtual connection (VC) which is established when a user requests a network connection in the ATM system. Additional details regarding these and other aspects of ATM systems can be found in the ATM Forum, "ATM User-Network Interface Specification," Version 3.1, September, 1994, and in Martin de Prycker, "Asynchronous Transfer Mode: Solution for Broadband ISDN," Ellis Horwood, N.Y., 1993.
FIG. 1 shows a typical ATM switch 10. The switch 10 includes a control processor 12 which directs the operation of a switch fabric 14. The switch fabric in turn drives N line cards 16-i, i=1, 2, . . . N. Each of the N line cards 16-i serves to interface the switch 10 to a corresponding physical link or trunk of an established ATM network connection. For example, one of the N line cards may interface with a computer of a network user, while another one of the line cards interfaces with a physical layer of a communication network, so as to allow the user to communicate over the physical layer of the network via the ATM switch 10. The control processor 12 is responsible for configuring and maintaining the switch 10. FIG. 2 illustrates one of the line cards 16-i in greater detail. The line card 16-i includes a Utopia port 22, a transmission convergence (TC) device 24, a physical media dependent (PMD) device 26, and a synchronous optical network (SONET) port 28. The transmission convergence device 24 interfaces an ATM cell-based switch fabric interconnect, such as the Utopia port 22, to a bit-level physical layer interconnect, such as SONET port 28. The line card 16-i further includes a utility bus 30, a utility bus interface 32, a local microprocessor 34, a random access memory (RAM) 36, and a read-only memory 38. The elements 30, 32, 34, 36 and 38 are used to provide configuration, status and other control functions for the line card 16-i. The utility bus 30 is a global utility bus used to provide communication between the N line cards of switch 10 so that the local microprocessors in the line cards can, for example, coordinate configurations or collect statistics.
A significant problem with the conventional ATM switch line card arrangement shown in FIG. 2 is the added expense and complexity associated with providing a separate utility bus interface and microprocessor-based control circuitry for each of the line cards. Although the utility bus 30 can be of lower bandwidth than the ATM switch 10, it still needs to be scaled with the size of the switch, and potentially may be required to interconnect hundreds of line cards. The cost of this separate line card control hardware can therefore be excessive. Moreover, the transmission convergence device 24 is required to include additional input/output pins for interfacing with the control hardware, and therefore its die size, package size and power consumption are unduly increased. Other types of conventional line cards do not include a local microprocessor, but instead utilize an on-board microcontroller to interface via a separate line card control bus to a central controller which provides configuration, status and other types of control processing for the line cards. Although the hardware cost of such cards may be less than that of cards including a local microprocessor, the use of the separate control network for providing line card configuration and control still unduly increases the size, cost and complexity of the transmission convergence device, the line card and the ATM switch.
Most conventional ATM switches thus utilize line cards which include some type of separate line card control bus and control hardware. Examples of conventional transmission convergence devices for use in line cards such as that shown in FIG. 2 include the PM5355 S/UNI-622 and PM5346 S/UNI-155-LITE Saturn User Network Interfaces from PMC-Sierra, Inc. of Burnaby, BC, Canada, the IDT77105 PHY (TC-PMD) from Integrated Device Technology, Inc. of Santa Clara, Calif., and the T7254 Four-Port ISDN User-Network Interface Termination for Switches from the Microelectronics Group of Lucent Technologies, formerly AT&T Microelectronics, of Allentown, Pa. These exemplary transmission convergence devices are designed for integration into a line card, and each is designed to support a separate control bus for the line card. The size, cost and complexity of such devices could be considerably reduced if a mechanism was available for providing line card control without the need for a separate line card control bus or other separate control interface. It is therefore apparent that a need exists for improved line card control techniques for use in ATM switches and other packet-based communication devices.